Comments on: Macintosh: Intel Inside, And What It Might Mean For PalmSource http://tewha.net/2005/06/macintosh-intel-inside-and-what-it-might-mean-for-palmsource/ A blog on technical stuff by Steven Fisher. Cat pictures not included. Tue, 06 Jan 2009 08:47:03 +0000 http://wordpress.org/?v=2.7 hourly 1 By: Ben Combee http://tewha.net/2005/06/macintosh-intel-inside-and-what-it-might-mean-for-palmsource/comment-page-1/#comment-25 Ben Combee Sat, 04 Jun 2005 17:23:55 +0000 http://www.objectsatrest.com/2005/06/macintosh-intel-inside-and-what-it-might-mean-for-palmsource/#comment-25 Well, in a sense, this is what Transmeta was doing -- they had a sophisticated VLIW execution engine and code that translated x86 to it. ARM chips also use this concept; the Thumb instruction set is a front-end for their 32-bit instruction where single 16-bit-long instructions get expanded into the full size ones. I can't say this is what Intel would be doing, but it's certainly possible. Well, in a sense, this is what Transmeta was doing — they had a sophisticated VLIW execution engine and code that translated x86 to it. ARM chips also use this concept; the Thumb instruction set is a front-end for their 32-bit instruction where single 16-bit-long instructions get expanded into the full size ones. I can’t say this is what Intel would be doing, but it’s certainly possible.

]]> By: Steven Fisher http://tewha.net/2005/06/macintosh-intel-inside-and-what-it-might-mean-for-palmsource/comment-page-1/#comment-24 Steven Fisher Sat, 04 Jun 2005 07:39:33 +0000 http://www.objectsatrest.com/2005/06/macintosh-intel-inside-and-what-it-might-mean-for-palmsource/#comment-24 Come to think of it, this whole idea of decoding personalities has been around for a while, hasn't it? I seem to remember reading that this would change the world in the days when the Powerbook Duo 230 in 1992 or so, and that's only because that's when I started really stuff by the <em>really</em> clever monkeys. It could be that it makes sense to not only standardize the scheduling/execution units, but to just tack on decoding units. Want to compete with the ARM? Throw in an ARM decoder. Want to complete with a PowerPC? Throw one of them in, too. x86? Here ya go, we got one of those too. All in the same chip. I know these percentages are insane, but of the decoding unit is 60%, it might not make any sense at all. 1% and it probably would. I wonder where would it stop making sense, and if we're above or below that right now. There's other implications here, too. The x86 decoding unit fails testing but the PowerPC one doesn't? Ship it as a PowerPC-only chip. Huh. Thanks for the thoughts, Ben. :) Come to think of it, this whole idea of decoding personalities has been around for a while, hasn’t it? I seem to remember reading that this would change the world in the days when the Powerbook Duo 230 in 1992 or so, and that’s only because that’s when I started really stuff by the really clever monkeys.

It could be that it makes sense to not only standardize the scheduling/execution units, but to just tack on decoding units. Want to compete with the ARM? Throw in an ARM decoder. Want to complete with a PowerPC? Throw one of them in, too. x86? Here ya go, we got one of those too. All in the same chip. I know these percentages are insane, but of the decoding unit is 60%, it might not make any sense at all. 1% and it probably would. I wonder where would it stop making sense, and if we’re above or below that right now.

There’s other implications here, too. The x86 decoding unit fails testing but the PowerPC one doesn’t? Ship it as a PowerPC-only chip.

Huh. Thanks for the thoughts, Ben. :)

]]> By: Steven Fisher http://tewha.net/2005/06/macintosh-intel-inside-and-what-it-might-mean-for-palmsource/comment-page-1/#comment-23 Steven Fisher Sat, 04 Jun 2005 07:30:24 +0000 http://www.objectsatrest.com/2005/06/macintosh-intel-inside-and-what-it-might-mean-for-palmsource/#comment-23 It's definitely a strange theory, but I think it's a little less strange than Apple's new strategy being "Mac OS X on x86 next year, and you'll all come with us, right?" That sounds like taking the worst of Adam Osborne's strategy ("what we've got now is crap, but wait to next year") with something uniquely Apple ("we told you what we're switching to was crap last year, but now it's better!"). Hmm, the idea of a chip that could run both instruction sets is really intriguing. Any idea what portion of the P4/PM is dedicated to x86 decoding? (Btw, sorry for the article editing. I'm switching the article to MarkDown instead of HTML behind the scenes. I really hate the a href="blahblah" link title /a syntax, and I can't believe how smoothly it's going.) It’s definitely a strange theory, but I think it’s a little less strange than Apple’s new strategy being “Mac OS X on x86 next year, and you’ll all come with us, right?” That sounds like taking the worst of Adam Osborne’s strategy (”what we’ve got now is crap, but wait to next year”) with something uniquely Apple (”we told you what we’re switching to was crap last year, but now it’s better!”).

Hmm, the idea of a chip that could run both instruction sets is really intriguing. Any idea what portion of the P4/PM is dedicated to x86 decoding?

(Btw, sorry for the article editing. I’m switching the article to MarkDown instead of HTML behind the scenes. I really hate the a href=”blahblah” link title /a syntax, and I can’t believe how smoothly it’s going.)

]]> By: Ben Combee http://tewha.net/2005/06/macintosh-intel-inside-and-what-it-might-mean-for-palmsource/comment-page-1/#comment-22 Ben Combee Sat, 04 Jun 2005 07:22:43 +0000 http://www.objectsatrest.com/2005/06/macintosh-intel-inside-and-what-it-might-mean-for-palmsource/#comment-22 Interesting idea... I know current Pentium IV and Pentium-M chips are implemented with a decoder front-end that converts x86 instructions to a simpler RISC-based form for scheduling and execution. I wonder how difficult it would be to add a PowerPC front end to that execution unit, giving a chip that can run both x86 and PPC code depending on the CPU mode. Interesting idea… I know current Pentium IV and Pentium-M chips are implemented with a decoder front-end that converts x86 instructions to a simpler RISC-based form for scheduling and execution. I wonder how difficult it would be to add a PowerPC front end to that execution unit, giving a chip that can run both x86 and PPC code depending on the CPU mode.

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